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ADP-DRC-II> Deep Memory Xilinx Virtex-II PCI card
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The ADP-DRC-II is a high performance
reconfigurable PCI card based on the
Xilinx Virtex-II range of Platform
FPGAs. Features include four independent
DIMM memory banks, 2 MByte or 4 MByte
DDR SSRAM, 64/66 PCI interface, programmable
clocks, battery backed encryption
and flash boot facilities. A comprehensive
cross platform API with support for
WinNT/2000/XP, Linux and VxWorks provides
access to the full functionality of
these hardware features.
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| Feature |
Specification |
| FPGA |
Xilinx Virtex-II
2V4000, 2V6000, 2V8000
Supports all speed grades
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| PCI
Bus |
Universal PCI rev 2.2 compliant
PLX 9656 ASIC with 66MHz 64-bit PCI bus
and 66MHz 32-bit local bus. Twin DMA controllers,
fifo and interrupt controller peak data
rate 533 MByte/sec 220 MByte/sec sustained
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| Memory |
DDR SDRAM
Up to 16 GByte using 4 independently addressable
72-bit DDR SDRAM DIMMs
DDR SSRAM
Up to 4 MByte using 1024K x 32 DDR SDRAM
Flash
16MBytes
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I/O |
Mictor 50 way connector
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| Clocks |
On board clock generator provides
a synchronous local bus clock for the PCI
interface and the Virtex FPGA.
A second clock is provided to the Virtex FPGA
for user applications and can be free running
or stepped under software control.
Both clocks are programmable and can be used
by the Virtex Clock
DLL functions:-
Local Bus
400kHz to 66 MHz
User Clock
0Hz to 100MHz |
| Configuration |
PCI Bus direct to SelectMAP
port
From Flash direct on power up
External JTAG connector |
| SelectMap |
Configuration port supports
direct access to Virtex-II configuration for
download or readback. DMA can be used for
rapid configuration. Support for Xilinx ChipScope®. |
| Encrypting |
Dual battery back-up for Virtex-II
encryption keys |
| Software
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Drivers for WinNT, 2000, XP,
linux and VxWorks
API with template designs in VHDL and Verilog |
| Ordering
Information |
ADP-DRC-II/xxxx-y/m
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| parameter |
description |
options |
xxxx
y - 4, 5, 6
m
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Virtex device
Virtex speed
GByte DDR SDRAM
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4000, 6000, 8000
4, 5, 6
1 (std), 2, 4, 8, 16
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(C) Copyright 2006 Alpha Data. All Rights Reserved
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