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ADM-XPL> Xilinx reconfigurable computer based on Virtex-II
Pro
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The ADM-XPL provides a
high performance platform
to allow users to leverage
the feature rich architecture
of the Xilinx Virtex-II
Pro Platform FPGA. The
XPL is available in PMC
format with adapters for
PCI, CompactPCI and VME.
A full software development
kit is included to allow
application development
for FPGA fabric and PowerPC
to begin immediately.
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| Feature |
Specification |
| FPGA |
Xilinx Virtex-II
2VP7, 2VP20, 2VP30
Supports all FF896 devices
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| PCI
Bus |
3.3V PCI rev 2.2 compliant optional PCI-X
Virtex-II 2V1000 with 66MHz 64-bit PCI bus
and 66MHz 66-bit local bus. PCI-X capable.
Twin DMA controllers, fifo and interrupt
controller peak data rate 528MBytes/sec
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| Memory |
SSRAM
1 bank ZBT 512k/1024K x 64 bits
SDRAM
1 bank DDR 64MByte / 128MByte
Flash
16MBytes
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| Front I/O |
4 Rocket I/O
or
XRM front panel
adapters
Custom XRM modules
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| Clocks |
On board programmable
clock generator provides a user clock of up
to 160MHz and a synchronous local bus clock
of up to 80MHz |
| Configuration |
PCI Bus direct to SelectMAP
port
From Flash direct on power up
External JTAG connector |
| SelectMap |
Configuration port supports
direct access to Virtex-II configuration for
download or readback. DMA can be used for
rapid configuration. Support for Xilinx ChipScope®. |
| Encrypting |
Dual battery back-up for Virtex-II
encryption keys |
| Software
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Drivers for WinNT, 2000, XP,
linux and VxWorks
API with template designs in VHDL and Verilog |
| Ordering
Information |
ADM-XPL/xxxx-y/z/m(IO)
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| parameter |
description |
options |
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xx
y
z
m
IO
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Virtex-II Pro device
Virtex-II Pro speed
ZBT memory (MByte)
DDR SDRAM (MByte)
Front Panel Adapter
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7, 20, 30
5, 6, 7
4, 8
64, 128
XRM-ETH (std),
XRM-IO146, XRM-IO34,
XRM-ADC, XRM-DAC,
XRM-FPDP, XRM-MDR26,
XRM-ZBT, XRM-RIO,
HSSDC2 (factory fit option)
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(C) Copyright 2006 Alpha Data. All Rights Reserved
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