| Feature |
Specification |
| FPGA |
Xilinx Virtex-II
2VP70, 2VP100, 2VP125
Supports all FF1704 devices
|
| HostI
Bus |
PCI - 3.3V signaling only
PCI-X or 66MHz 64-bit PCI bus and 80MHz
64-bit local bus.
Twin DMA controllers, FIFO and interrupt
controller.
|
| Memory |
SSRAM
4 banks DDR SSRAM 512k/1024K x 36 bits (8/16MByte)
SDRAM
2 banks DDR 16M/32M x 32 (128/256MByte)
Flash
FPGA Configuration Flash 32MByte
PowerPC Boot Flash 32MByte
|
| Front I/O |
146 I/O via XRM
adapters with support for 8 RocketIO
Custom XRM modules
|
| Rear I/O |
64 I/O connections via PMC Pn4
connector |
| Clocks |
On board programmable clock generator provides a user clock of
up to 160MHz and a synchronous local bus clock of up to 80MHz
Separate low jitter MGT clock - 125MHz default configuration
|
| Configuration |
PCI Bus direct to SelectMAP
port
From Flash direct on power up
External JTAG connector |
| SelectMap |
Configuration port supports
direct access to Virtex-II configuration for
download or readback. DMA can be used for
rapid configuration. Support for Xilinx ChipScope®. |
| Encryption |
Dual battery back-up for Virtex-II
encryption keys |
| Software
|
Drivers for WinNT, 2000, XP,
Linux and VxWorks
API with comprehensive template designs in
VHDL and Verilog |
| Ordering
Information |
ADM-XP/x-y/s/d/(IO)
|
| parameter |
description |
options |
x
y
s
d
IO
|
Virtex-II Pro device
Virtex-II Pro speed
DDR SSRAM
DDR SDRAM
Front Panel Adapter
|
2VP70, 2VP100
5, 6, 7
8/16 MBytes
128/256 MBytes
XRM-IO146 (std),
XRM-IO34, XRM-ADC,
XRM-DAC, XRM-DDR,
XRM-FPDP, XRM-MDR26,
XRM-ZBT, XRM-RIO,
XRM-ETH, XRM-CAMERALINK
XRM-OPT, XRM-HSSDC2
|
> Datasheets
