| Feature |
Specification |
| Format |
Full
length 64-bit PCI card |
| FPGA |
Xilinx
Virtex V405E, V812E, V1000E, V2000E-6/7/8-BG560 |
| PCI
Bus |
Universal PCI rev 2.1 compliant
|
| SSRAM |
4 independent banks asynchronous SRAM 512K
x 32
|
| I/O |
One PMC front panel I/O via PC bracket
One PMC front panel internal to PC
50 I/O connections routed from Virtex to 64
pin header
|
| Clocks |
On board clock
generator provides a synchronous local bus clock
for
the PCI interface and the Virtex FPGA.
A second clock is provided to the Virtex FPGA
for user applications and can be free running
or stepped under software control.
Both clocks are programmable and can be used by
the Virtex Clock
DLL functions:-
Local Bus
400kHz to 40 MHz
User Clock
0Hz to 100MHz |
| Configuration |
PCI Bus direct
to SelectMAP port
External JTAG connector |
| SelectMap |
Configuration
port supports direct access to Virtex-II configuration
for download or readback. DMA can be used for
rapid configuration. Support for Xilinx ChipScope®. |
| Power Consumption
|
5V @ 600mA
3.3V @ 1200mA |
| Ordering Information
|
ADC-RC1000/xxxx-y
xxxx - Virtex device 405E/812E/1000E/2000E
y - Virtex speed 6 / 7 / 8
|